1. Field of the Disclosure
The present application relates to a thin film transistor array substrate and a fabricating method thereof. The thin film transistor array prevents generation of an undesirable capacitance through the formation of a channel region with a shorter length to improve drive performance and enhance brightness and picture quality.
2. Description of the Related Art
Display devices can use display fields to visually represent electrical information signals. Flat panel display devices, which have been rapidly replacing the existing cathode ray tubes (CRTs) can be slim and light weight and can operate with low power consumption.
Flat panel display devices can be, for example, liquid crystal display (LCD) devices, organic light emitting display (OLED) devices, electrophoretic display (electric paper display (EPD)) devices, plasma display panel device (PDPs), field emission display (FED) devices, electroluminescence display devices (ELDs), and elector-wetting display (EWD) devices. Flat panel display devices commonly include a flat display panel configured to include a pair of substrates facing each other, the pair of substrates having an inherent light emitting or polarizing material layer therebetween.
Flat display panels can be configured to operate in a passive matrix driving mode or an active matrix driving mode.
The flat display panels configured to operate in the passive matrix driving mode include a plurality of pixels formed at intersections of scan lines and signal lines. The pixels can be driven while signals are applied to the respective scan and signal lines crossing each other. As such, the flat display panels configured to operate in the passive matrix driving mode can be simply controlled but the pixels on the flat display panels cannot be driven independently of one another. Therefore, definition and response speed must be of the flat display panels configured to operate in the passive matrix driving mode is low which makes it difficult to realize a high definition image.
The flat display panels configured to operate in the active matrix driving mode include a plurality of thin film transistors arranged in respective pixels and used as switch elements. Each of the thin film transistors is turned-on/off and to allow the plurality of pixels to be selectively driven. Although the flat display panels configured to operate in the active matrix driving mode require a complex control scheme, the plurality of pixels can be driven independently of one another. As such, the flat display panels configured to operate in the active matrix driving mode can provide high definition and high response speed compared to flat display panels configured to operate in the passive matrix driving mode. Therefore, the flat display panels configured to operate in the active matrix driving mode can easily realize a high definition image.
The flat display panels configured to operate in the active matrix driving mode must necessarily include a transistor array substrate suitable to independently drive the plurality of pixels.
The transistor array substrate includes gate lines and data lines which cross each other and define a plurality of pixels. Also, the transistor array substrate includes a plurality of thin film transistors opposite to the plurality of pixels. The plurality of thin film transistors are each arranged at intersections of the gate lines and the data lines.
Each of the thin film transistors includes a gate electrode connected to one of the gate lines, a source electrode connected to one of the data lines, a drain electrode connected to a respective pixel electrode, and an active layer forming a channel region between the source electrode and the drain electrode according to a voltage level of the gate electrode. The active layer overlaps at least part of the gate electrode with a gate insulation layer therebetween. Such thin film transistors can be selectively turned-on by a signal on the respective gate line. Another signal on the respective data line is transferred to the respective pixel electrode.
Thin film transistors can be a-Si (amorphous silicon) thin film transistors, oxide thin film transistors, and LTPS (low temperature poly-silicon) thin film transistors. Oxide thin film transistors require an annealing process for the active layer. Moreover, an etch stop layer for protecting a channel region of the active layer can be formed, and a portion of the active layer overlapping the etch stop layer can be defined as the channel region. As such, the etch stop layer must partially overlap the source electrode and the drain electrode. Also, it is necessary to secure a process margin for the overlapping regions. Due to this, the length of the channel region in oxide thin film transistors can be longer than desired which causes the size of the oxide thin film transistors to be increased and the current capability to be greatly deteriorated.
Also, the source electrode and the drain electrode overlap the etch stop layer, the active layer and the gate electrode. Because the source electrode and the drain electrode overlap the gate electrode, an undesirable capacitance is formed between the source and drain electrodes, and the gate electrode. The undesirable capacitance negatively impacts the driving scheme of oxide thin film transistors, which does not occur for other types of thin film transistors. As such, oxide thin film transistors cannot be driven at as high of a speed.
Moreover, fabricating methods of thin film transistor array substrates according to related art generally include forming a gate line and a gate electrode, forming an active layer, forming an etch stop layer, forming a data line and source electrode and drain electrode, forming a passivation film, and forming a pixel electrode. Six masks are used to perform the formation processes which increases process time (or period) and fabrication costs.